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| 0.35 m CMOS Gate Array CMOS-9HD Family 35 ted 0. a integr highly n on nerati t reductio ge cond- able cos Se nsider Co y e arra t OS ga M m C Newcts rodu P FEATURES The CMOS-9HD Family is a channel-less type gate array that uses the 0.35-m leading-edge process and realizes 960,000 usable gates. This family is adaptable for both high-speed and low-power consumption systems. Currently supporting a 3.3-V supply voltage, it is expected that the future lineup will be able to support a supply voltage of 2.5 V. High Integration/Low Power Consumption * Maximum of 960,000 usable gates integrated * Improved cell structure, higher density * Lower power consumption (a further 30% reduction from CMOS-9) 1.0 0.4 Cell size comparison (1 cell) CMOS-9: NEC's conventional 0.35-m gate array CMOS-9 CMOS-9HD In Pursuit of Lower Cost * Enhanced cost competitiveness through chip-size shrinkage * Fewer gate masters leading to further cost reduction (Example) Comparison with CMOS-8L Although the 30k-gate CMOS-8L and the 53k-gate CMOS-9HD are similar in terms of price, because the cell density is higher in the CMOS-9HD, for an area of 30k integrated gates or more, the CMOS-9HD is the more cost-competitive choice. Note that the applicable-package pin-count range differs depending on the chip size, even if the gate scale is identical. 30k gates 53k gates Chip size comparison CMOS-8L: NEC's conventional 0.5-m gate array CMOS-8L CMOS-9HD 2 Pamphlet A12852EJ3V0PF00 Ultra High-Speed Operation * tPD = 131 ps (2-input NAND, fanout = 1, standard wiring length) * tPD = 107 ps (2-input NAND (power gate), fanout = 1, standard wiring length) * tPD = 229 ps (input buffer, fanout = 1, standard wiring length) * tPD = 222 ps (input buffer, standard load) * tPD = 1396 ps (output buffer, CL = 50 pF) Provision of Function Block Enabling High Speed/High Integration * Including high speed and low power, compatible with CMOS-8L Family * Scan path block * Driver for clock tree synthesis * Asynchronous single-port RAM (45 types) * Asynchronous dual-port RAM (45 types) * Asynchronous compiled single-port RAM * Synchronous/asynchronous compiled dual-port RAM Abundance of Peripheral Blocks * LVTTL/TTL 5-V withstand voltage interface buffer * LVTTL interface buffer with fail safe function * High drive capacity buffer (IOL = 24 mA) * PCI * GTL+ * Low-noise buffer * Buffers with on-chip pull-up resistors (5 k, 50 k) * Buffers with on-chip pull-down resistors (50 k) * Digital PLL (33 to 80 MHz) * Digital PLL (multiple) Power Consumption * 0.524 W/MHz/cell (Internal gates, VDD = 3.3 V) Support of Variety of Pin Count Packages * 100- to 304-pin plastic QFP (fine-pitch) * 160-pin, 208-pin plastic QFP (fine-pitch, with heat spreader) * 48- to 120-pin plastic TQFP * 144-pin plastic LQFP * 225- to 352-pin plastic BGA * 108- to 304-pin plastic FBGA * 256- to 696-pin tape BGA (with heat spreader) Pamphlet A12852EJ3V0PF00 3 Precision Delay Estimation Effect of break in input waveform Calculation taking into account elemental drive capability and output load capacity, as well as break in input waveform Clock Tree Synthesis * Clock tree automatically synthesized during layout to minimize clock skew * Up to 10000 flip-flops can be connected (Layout image) (Circuit diagram upon input) F/F Input buffer FCTS F/F F/F F/F To each flip-flop F/F F/F To each flip-flop F/F F/F To each flip-flop To each flip-flop 4 Pamphlet A12852EJ3V0PF00 Multifarious Function Block Mounting Capability The function blocks ensure functional compatibility with conventional products and facilitate transfer or appropriation of existing design data. Memory block RAM Soft macro Compiled RAM macro ROM macro Logic Counter Shift register Flip-flops, etc. Digital PLL (33 to 80 MHz) Digital PLL (Multiple) CPU peripheral block Serial interface unit Parallel interface unit Interrupt controller, etc. Interface block GTL+ PCINote 5-V withstand voltage/LVTTL buffer Low-noise buffer 3-state buffer Open-drain buffer LVTTL interface buffer with fail safe function High drive capacity buffer (IOL = 24 mA) Buffers with pull-up resistors (5 k, 50 k) Buffers with pull-down resistors (50 k) Note Standard interface recommended by Intel Corp. (PCI = Peripheral Component Interconnect) Applications (Supported Fields) All fields from large-scale high-speed processing systems to small and medium scale general applications are covered. * Multimedia market PC, AV, moving picture processing, 3D, etc. * Communications market High-speed communication, cellular terminals, etc. * OA, industrial, and other applications. Pamphlet A12852EJ3V0PF00 5 PRODUCT OUTLINE List of Product Types 3-layer wiring Part Number Number of signals Number of pads Number of integrated gates Number of usable gates PD65943 156 172 75740 53018 PD65944 180 196 100602 70421 PD65945 200 216 128338 89836 PD65946 252 268 202630 141841 PD65948 308 324 312684 218879 PD65949 364 380 437136 262281 PD65951 416 436 585390 321964 PD65954 496 516 835664 459615 PD65956 572 588 1096452 603048 PD65958 692 708 1615646 807823 Remark The actual number of usable signal lines depends on the package and the number of power supply and GND pins used. 4-layer wiring Part Number Number of signals Number of pads Number of integrated gates Number of usable gates PD65961 - 436 585390 380503 PD65964 - 516 835664 54318 PD65966 - 588 1096452 712693 PD65968 - 708 1615646 969387 PD65969 - 764 1904700 1142820 PD65970 - 820 2196592 1317955 PD65971 - 876 2509284 1505570 Remark The actual number of usable signal lines depends on the package and the number of power supply and GND pins used. 6 Pamphlet A12852EJ3V0PF00 List of Packages 3-layer wiring Package Plastic QFP (fine-pitch) Pins 100 120 144 160 176 208 240 304 Plastic QFP (fine-pitch)Note Plastic TQFP 160 208 48 64 80 100 120 Plastic LQFP Plastic BGA 144 225 256 272 313 352 Plastic FBGA 108 144 160 176 208 240 304 Plastic BGA (advanced) Tape BGANote 672 256 352 420 500 576 696 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - (1/2) PD65943 - - - - - - - PD65944 - - - - - - - - PD65945 - - - - - - - PD65946 - - - - - PD65948 - - - - - - Note With heat spreader Remark : Supported, - : Not supported, Blank : Under consideration Pamphlet A12852EJ3V0PF00 7 List of Packages 3-layer wiring Package Plastic QFP (fine-pitch) Pins 100 120 144 160 176 208 240 304 Plastic QFP (fine-pitch) Note Plastic TQFP 160 208 48 64 80 100 120 Plastic LQFP Plastic BGA 144 225 256 272 313 352 Plastic FBGA 108 144 160 176 208 240 304 Plastic BGA (advanced) Tape BGA Note 672 256 352 420 500 576 696 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - (2/2) PD65949 - PD65951 - PD65954 - - PD65956 - - - PD65958 - - - - - Note With heat spreader Remark : Supported, - : Not supported, Blank : Under consideration 8 Pamphlet A12852EJ3V0PF00 List of Packages 4-layer wiring Package Plastic QFP (fine-pitch)Note Tape BGANote Pins 160 208 256 352 420 500 576 696 Plastic BGA (advanced) 672 - - - - - - - - - - - - - - (1/2) PD65961 - PD65964 - PD65966 - PD65968 - PD65969 - Note With heat spreader Remark - : Not supported, Blank : Under consideration 4-layer wiring Package Plastic QFP (fine-pitch)Note Tape BGANote Pins 160 208 256 352 420 500 576 696 Plastic BGA (advanced) 672 Note With heat spreader Remark - : Not supported, Blank : Under consideration - - (2/2) PD65970 - PD65971 - Pamphlet A12852EJ3V0PF00 9 ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Parameter Supply voltage Input voltage LVTTL interface buffer LVTTL interface buffer with fail safe function TTL 5-V withstand voltage interface buffer Output voltage LVTTL output buffer TTL 5-V output buffer 5-V output buffer for CMOS Input/output voltage Output current Note Symbol VDD Conditions Ratings -0.5 to +4.6 Unit V VI VI VI < VDD + 0.5 V VI < VDD + 0.5 V -0.5 to +4.6 -0.5 to +4.6 V V VI VI < VDD + 3.0 V -0.5 to +6.6 V VO VO VO VI/VO IO VO < VDD + 0.5 V VO < VDD + 3.0 V VO < VDD + 3.0 V Normal I/O pin IOL = 1 mA (FV0A) IOL = 2 mA (FV0B) IOL = 3 mA (FO09) IOL = 6 mA (FO04) IOL = 9 mA (FO01) IOL = 12 mA (FO02) IOL = 18 mA (FO03) IOL = 24 mA (FO06) -0.5 to +4.6 -0.5 to +6.6 -0.5 to +6.6 -0.5 to VDD + 0.5 3 7 10 20 30 40 60 75 -40 to +85 -65 to +150 V V V V mA mA mA mA mA mA mA mA C C Operating ambient temperature Storage temperature TA Tstg Note Output current: Indicates the maximum value of the current that is allowed to flow directly through this output pin. Remark With the exception of the buffer with fail safe function, be sure to input voltage to the I/O pins only after the supply voltage has been fixed. 10 Pamphlet A12852EJ3V0PF00 Recommended Operating Range Parameter Supply voltage High-level input voltage Low-level input voltage Positive trigger voltage Negative trigger voltage Hysteresis voltage High-level input voltage Low-level input voltage Positive trigger voltage Negative trigger voltage Hysteresis voltage Input rise time Input fall time Input rise time Input fall time Symbol VDD VIH VIL VP VN VH VIH VIL VP VN VH tri tfi tri tfi Schmitt input Normal input TTL 5-V withstand voltage interface Conditions LVTTL interface MIN. 3.00 2.0 0 1.4 0.8 0.3 2.0 0 1.4 0.8 0.3 0 0 0 0 TYP. 3.30 MAX. 3.60 VDD 0.8 2.4 1.6 1.5 5.5 0.8 2.4 1.6 1.5 200 200 10 10 Unit V V V V V V V V V V V ns ns ms ms Pamphlet A12852EJ3V0PF00 11 DC Characteristics (VDD = 3.3 V 0.3 V) (1/3) Parameter Static current consumption Note 1 Symbol Conditions MIN. TYP. MAX. Unit PD65943, PD65944, PD65945, PD65946, PD65948, PD65949, PD65951, PD65954, PD65956 PD65958 Off-state output current LVTTL output TTL 5-V withstand voltage output 5-V withstand voltage for CMOS Output current flow Note 3 Note 2 IDDS VI = VDD or GND 2.0 300 A IDDS VI = VDD or GND 0 400 A A A A A A mA IDDS VI = VDD or GND 4.0 800 10 10 10 0.1 IOZ IOZ IOZ IR VO = VDD or GND VO = VDD or GND VO = VDD or GND VPU = 5.5 V, RPU =2 k, VO = 3.0 V 5-V output for CMOS Output short-circuit current Input leakage current Normal input With pull-up resistor (50 k) With pull-up resistor (5 k) With pull-down resistor (50 k) Pull-up resistor 50 k Pull-up resistor 5 k Pull-down resistor 50 k II II II II RPU RPU RPD Note 4 IOS VO = GND -250 1.0 -28 -280 28 18.9 1.9 18.9 -83 -700 83 39.8 4.7 39.8 -190 -1900 190 107.1 10.7 107.1 VI = VDD or GND VI = GND VI = GND VI = VDD A A A A k k k Notes 1. When using I/O blocks (etc.) with pull-up/pull-down resistors incorporated, the static current consumption increases. 2. Because there is a bias toward the 5-V protection circuit in the TTL 5-V withstand voltage and 5-V withstand voltage for CMOS 3state or I/O buffers, the output-off state current increases slightly. 3. When the LSI supply current is pulled up to a higher voltage in the CMOS output buffer, a current that flows from the output pin to inside the LSI is generated. 4. The output short-circuit time is less than 1 second and for 1 LSI pin only. Remarks 1. The + and - symbols attached to the current values in the table indicate the direction of the current. The symbol is + when the current is flowing into the device, and - when flowing out of the device. 2. Blanks in the table indicate that the values are undergoing evaluation. 12 Pamphlet A12852EJ3V0PF00 DC Characteristics (VDD = 3.3 V 0.3 V) (2/3) Parameter Low-level output current 3 mA buffer (FO09) 6 mA buffer (FO04) 9 mA buffer (FO01) 12 mA buffer (FO02) 18 mA buffer (FO03) 24 mA buffer (FO06) 1 mA buffer (FV0A) 2 mA buffer (FV0B) 3 mA buffer (FV09) 6 mA buffer (FV04) 9 mA buffer (FV01) 12 mA buffer (FV02) 18 mA buffer (FV03) 24 mA buffer (FV06) 3 mA buffer (FY09) 6 mA buffer (FY04) 9 mA buffer (FY01) 12 mA buffer (FY02) 18 mA buffer (FY03) 24 mA buffer (FY06) IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL 5-V withstand voltage output for CMOS type VOL = 0.4 V TTL 5-V withstand voltage output type VOL = 0.4 V LVTTL output type VOL = 0.4 V 3.00 6.00 9.00 12.00 18.00 24.00 1.00 2.00 3.00 6.00 9.00 12.00 18.00 24.00 3.00 6.00 9.00 12.00 18.00 24.00 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Symbol Conditions MIN. TYP. MAX. Unit Pamphlet A12852EJ3V0PF00 13 DC Characteristics (VDD = 3.3 V 0.3 V) (3/3) Parameter High-level output current 3 mA buffer (FO09) 6 mA buffer (FO04) 9 mA buffer (FO01) 12 mA buffer (FO02) 18 mA buffer (FO03) 24 mA buffer (FO06) 1 mA buffer (FV0A) 2 mA buffer (FV0B) 3 mA buffer (FV09) 6 mA buffer (FV04) 9 mA buffer (FV01) 12 mA buffer (FV02) 18 mA buffer (FV03) 24 mA buffer (FV06) Low-level output voltage LVTTL output type LVTTL output type (with 5 k pull-up resistor) TTL 5-V withstand voltage output type 5-V withstand voltage output for CMOS type High-level output voltage LVTTL output type TTL 5-V withstand voltage output type VOH VOH IOH = 0 mA IOH = 0 mA VDD - 0.1 VDD - 0.2 V V VOL VOL VOL VOL IOL = 0 mA IOL = 0 mA IOL = 0 mA IOL = 0 mA 0.1 0.2 0.1 0.1 V V V V IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH TTL 5-V withstand voltage output type VOH = 2.4 V LVTTL output type VOH = 2.4 V -3.00 -6.00 -9.00 -12.00 -18.00 -24.00 -1.00 -1.00 -3.00 -3.00 -3.00 -3.00 -6.00 -6.00 mA mA mA mA mA mA mA mA mA mA mA mA mA mA Symbol Conditions MIN. TYP. MAX. Unit 14 Pamphlet A12852EJ3V0PF00 AC Characteristics The values in the table below refer to when the supply voltage of the internal gate array block is 3.3 V. Parameter Toggle frequency Propagation delay time Symbol ftog tPD Conditions Internal toggle F/F (fanout = 2) Internal gates Fanout = 1, wiring length 0 mm Fanout = 1, standard wiring length Standard load Internal gates, Fanout = 1, standard wiring length power gates, Standard load 2NAND Input buffers Fanout = 1, standard wiring length Standard load Output buffer (FO01) CL = 15 pF MIN. 670 TYP. MAX. Unit MHz 94 131 108 107 94 229 222 1396 2391 1872 ps ps ps ps ps ps ps ps ps ps Output rise time Output fall time tr tf Output buffer (FO01) CL = 15 pF Output buffer (FO01) CL = 15 pF Remark Standard load: Fanout = 2, wiring length 0 mm Pamphlet A12852EJ3V0PF00 15 TEST DESIGN Scan Path Test The scan path test is an effective technique in test simplification design. The ATG (Automatic Testpattern Generator) makes it possible to automatically generate a test pattern with high fault coverage. The features of NEC's scan path test are outlined below. * Automatic configuration of scan path * Faults of asynchronous clock detectable * Check tools for scan path design rule fully provided Outline of Scan Path Test Method Scan data in Scan data out Combinational circuit Scan path 16 Pamphlet A12852EJ3V0PF00 Combinational circuit Combinational circuit DEVELOPMENT TOOLS Easy interface with your EWS or PC Users can choose the following tools to their environment. Caution Some functions may not be supported. Make it sure before use. OPENCADTM V5.3 Configuration Tool Function Function simulator Schematic editor Logic synthesis Gate-level simulator Formal verifier STANote 2 Fault simulationNote 3 Design for test Floor planner Note 4 Note 2 NEC Tool - VdrawTM Note 1 - V. sim TM Note 1 Interface Data * Net list PWC/EDIF (2.0.0)/ Verilog HDL Commercially Available Tool Interface ModelSimTM Note 1/Verilog-XLTM/VCSTM - Design Compiler TM ModelSimNote 1/Verilog-XL/VCS FormalityTM - TiaraNote 1 C. FGRADETM NEC_SCAN ace_floorplan galet_floorplan * Delay data SDF * Test pattern ALBA/LOGPAT PrimeTimeTM - Testgen TM Note 4 - Layout and wiring Notes 3, 4 Galet * Timing limit Gate EnsembleTM Silicon EnsembleTM Notes 1. 2. 3. 4. Tool supported in the Windows NTTM version Sign-off tool Tool not supported in the HPTM version Individually supported tool Remark Platform : SUNTM (SolarisTM)/HP (HP-UXTM)/PC-9800 series (Windows NT)/IBM PC/ATTM (Windows NT) GUI : X11R5/MotifTM 1.2/Windows NT Pamphlet A12852EJ3V0PF00 17 OPENCAD, Vdraw, V. sim and C. FGRADE are trademarks of NEC Corporation. Verilog-XL, Gate Ensemble and Silicon Ensemble are trademarks of Cadence Design Systems, Inc. ModelSim is a trademark of Model Technology Inc. VCS, Design Compiler, Formality, PrimeTime and Testgen are trademarks of Synopsys, Inc. Windows NT is either registered trademark or trademark of Microsoft Corporation in the United States and/or other countries. HP and HP-UX are trademarks of Hewlett-Packard Co. SUN and Solaris are trademarks of SUN Microsystems, Inc. PC/AT is a trademark of IBM Corporation. Motif is a trademark of Open Software Foundation, Inc. (OSF). 18 Pamphlet A12852EJ3V0PF00 The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. * The information in this document is current as of April, 2000. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for @NEC (as defined above). M8E 00. 4 Pamphlet A12852EJ3V0PF00 19 For further information, please contact: NEC Corporation NEC Building 7-1, Shiba 5-chome, Minato-ku Tokyo 108-8001, Japan Tel: 03-3454-1111 http://www.ic.nec.co.jp/ [North & South America] NEC Electronics Inc. 2880 Scott Blvd. Santa Clara, CA 95050-2554, U.S.A. Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 http://www.necel.com/ NEC do Brasil S.A. Electron Devices Division Rodovia Presidente Dutra, Km 214 07210-902-Guarulhos-SP Brasil Tel: 55-11-6465-6810 Fax: 55-11-6465-6829 [Europe] NEC Electronics (Germany) GmbH Kanzlerstr. 2, 40472 Dusseldorf Germany Tel: 0211-650302 Fax: 0211-6503490 http://www.nec.de/ Munich Office Arabellastr. 17 81925 Munchen, Germany Tel: 089-921003-0 Fax: 089-92100315 Stuttgart Office Industriestr. 3 70507 Stuttgart, Germany Tel: 0711-99010-0 Fax: 0711-99010-19 Hannover Office Podbielskistr. 164 D-30177 Hannover, Germany Tel: 0511-33402-0 Fax: 0511-33402-34 Benelux Office Boschdijk 187a 5612 HB Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580 Scandinavia Office P.O. Box 134 18322 Taeby, Sweden Tel: 08-6380820 Fax: 08-6380388 NEC Electronics (UK) Limited Cygnus House, Sunrise Park Way, Milton Keynes, MK14 6NP, U.K. Tel: 01908-691-133 Fax: 01908-670-290 NEC Electronics (France) S.A. 9, rue Paul Dautier-BP 187 78142 Velizy-Villacoublay Cedex France Tel: 01-30-67-58-00 Fax: 01-30675899 Madrid Office Juan Esplandiu, 15 28007 Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860 NEC Electronics Italiana s.r.l. Via Fabio Filzi, 25/A, 20124 Milano, Italy Tel: 02-667541 Fax: 02-66754299 [Asia & Oceania] NEC Electronics Hong Kong Limited 12/F., Cityplaza 4, 12 Taikoo Wan Road, Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 Seoul Branch 10F, ILSONG Bldg., 157-37, Samsung-Dong, Kangnam-Ku Seoul, the Republic of Korea Tel: 02-528-0303 Fax: 02-528-4411 NEC Electronics Taiwan Ltd. 7F, No. 363 Fu Shing North Road Taipei, Taiwan, R. O. C. Tel: 02-2719-2377 Fax: 02-2719-5951 NEC Electronics Singapore Pte. Ltd. 101 Thomson Road #04-01/05 United Square, Singapore 307591 Tel: 65-253-8311 Fax: 65-250-3583 G99. 11 Document No. A12852EJ3V0PF00(3rd edition) Date Published June 2000 N CP(K) (c) NEC Corporation 1997 Printed in Japan |
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